A learning experience


When building the FCDs, I found a few failure modes where it meant I had to go back and debug a few of the boards, and I thought I’d share them with you.

All of these are manufacturing failures and are individually tested for and resolved on every device before dispatch.

The target is of course 100% no defects in the manufacturing process because the cost in time of fixing bugs is expensive. Reality is often different though.

The most common fault is a 1nF cap cracking after the rework for the HPF, I assume from the thermal stress. This shows itself as decreased sensitivity particularly at the lower end of the spectrum either permanently or intermittently, and if it’s intermittent, flexing the board makes it come and go as the cracked cap makes and loses connection. I am aware of only one unit that went out with this intermittent fault in the first batch. I sent a replacement immediately.

I now throw away the original 1nF cap during the rework process and put a new one in. This failure mode is also tested for on all units by deliberately applying mechanical stress to each board.

The next most common failure mode is on the tuner chip where the image rejection isn’t particularly good, typically only 15dB or so. To fix this, I have to replace the tuner chip. This has happened three times in 118 units.

On one unit the PIC wouldn’t cold boot into SDR mode, only bootloader mode. You could force it into SDR mode by using the “Switch to application” button. I replaced the PIC, and it worked fine after this.

I had one shorted ceramic 2.2uF chip capacitor across one of the supply lines. There was a just visible hairline crack on the cap when viewed through the microscope. The first check I do when plugging in is to check nothing’s overheating with the thumb test. The USB port is current limited to 500mA and the regulators all cut out at 200mA.

There was one case where there was a PCB short across one of the supply lines from some residual copper, that took quite some time to figure out.


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4 Responses to A learning experience

  1. Hi Howard,
    You may already know this but the cracked smt capacitor could be a result of the the way the PCB’s or FCD’s are broken out of there biscuits, if the PCB are as small as I can see they must be when the operator actually removes one from the biscuit thats were the stress occurs, I’m not sure how many FCD’s per biscuit probably 30 odd? but it doesn’t take much to crack those smt components, I doubt heat stress would be the cause?…just a thought.

    Clint – VK3CSJ

    • admin says:

      Hi Clint

      You a re right, there is stress on the boards when they are broken out.

      The rework is actually done after the boards have been broken out and been through a first test which includes sensitivity testing. I’m pretty sure that there’s something about the additional thermal cycling that breaks the 1nF cap, with one of the two conductive ends coming detached.


      • Mike says:

        There is probably a good reason why but if you have to change the capacitor – why do you still put it on the board for the first run through the oven?

        • admin says:

          Hi Mike

          Good question, I guess I just want to make sure it all tests out fine in its virgin form before doing the rework.